Chien-Chung Wang
24Patents
4h-index
23Co-inventors
63Inventor score
Filing activity: Dec 2, 2002 → Apr 10, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9391016B2 | MIM capacitor structure | Electricity | 19 | Active |
| US9368392B2 | MIM capacitor structure | Electricity | 9 | Active |
| US9219110B2 | MIM capacitor structure | Electricity | 8 | Active |
| USD556133S1 | Twin coaxial RF connector | General | 4 | Expired |
| US10707282B1 | Organic light-emitting diode display panels | Electricity | 4 | Active |
| US6734085B1 | Anti-type dosage as LDD implant | Electricity | 2 | Expired |
| US7377143B2 | Door lock with button stopper | Emerging Cross-Sectional Technologies | 2 | Expired |
| USD557213S1 | Twin coaxial RF connector | General | 1 | Expired |
| US11915952B2 | Temperature control method, apparatus, electronic device and storage medium for etching workbench | Electricity | 0 | Active |
| US11984389B2 | Integrated circuit package structure with conductive stair structure and method of manufacturing thereof | Electricity | 0 | Active |
| US12113046B2 | Method for preparing semiconductor device with wire bond | Electricity | 0 | Active |
| US11899419B2 | Integrated control management system | Physics | 0 | Active |
| US12230480B2 | Detaching and installing device for gas distribution plate of etching machine, and etching machine | Performing Operations; Transporting | 0 | Active |
| US11876072B2 | Method for preparing semiconductor device with wire bond | Electricity | 0 | Active |
| US6841460B2 | Anti-type dosage as LDD implant | Electricity | 0 | Expired |
| US11651896B2 | Method of manufacturing capacitor structure and capacitor structure | Electricity | 0 | Active |
| US12125642B2 | Method of manufacturing capacitor structure | Electricity | 0 | Active |
| US11018103B2 | Integrated circuit structure | Electricity | 0 | Active |
| US11676886B2 | Integrated circuit package structure with conductive stair structure and method of manufacturing thereof | Electricity | 0 | Active |
| US11847467B2 | Boot method for embedded system including first and second baseboard management controller (BMC) and operating system (OS) image file using shared non-volatile memory module | Physics | 0 | Active |
| US10615804B2 | Clock and data recovery circuit | Electricity | 0 | Active |
| US12013798B2 | Method of data synchronization and redundant server system | Physics | 0 | Active |
| US12374609B2 | Integrated circuit package structure with conductive stair structure | Electricity | 0 | Active |
| US11424124B2 | Method of forming a patterned hard mask and method of forming conductive lines | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.