High-linearity flash analog to digital converter
US10615815B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2019 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | May 1, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/338
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter circuit comprises code-shuffling circuitry, a plurality of digital-to-analog converter circuits, a plurality of difference circuits, and a plurality of latch circuits. The code-shuffling circuitry is operable to shuffle a plurality of digital codes among a plurality of its outputs. The plurality of digital-to-analog converter circuits are operable to convert a digital code on the respective one of the outputs to a corresponding one of a plurality of analog reference voltages. The plurality of difference circuits is operable to generate a respective one of a plurality of difference signals corresponding to a difference between an input voltage and a respective one of the plurality of reference voltages. The plurality of latch circuits is operable to latch a respective one of the plurality of difference signals to a corresponding one of a plurality of digital values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.