Chandrajit Debnath
24Patents
3h-index
15Co-inventors
56Inventor score
Filing activity: Sep 12, 2007 → Jun 12, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8587466B2 | System and method for a successive approximation analog to digital converter | Electricity | 13 | Active |
| US9258008B2 | Adaptive delay based asynchronous successive approximation analog-to-digital converter | Electricity | 7 | Active |
| US9705520B1 | Circuit and method for generating reference signals for hybrid analog-to-digital convertors | Electricity | 5 | Active |
| US8120385B2 | Reduction in kickback effect in comparators | Electricity | 3 | Active |
| US9780803B1 | Apparatus for built-in self-test (BIST) of a Nyquist rate analog-to-digital converter (ADC) circuit | Electricity | 3 | Active |
| US8581769B2 | Multiplying digital-to-analog converter configured to maintain impedance balancing | Electricity | 3 | Active |
| US8258818B2 | Operating a switched-capacitor circuit with reduced noise | Physics | 3 | Active |
| US8576102B2 | Calibration method and circuit | Electricity | 2 | Active |
| US7652535B2 | Continuous time common mode feedback circuit, system, and method | Electricity | 2 | Active |
| US10027343B2 | Circuit and method for generating reference signals for hybrid analog-to-digital convertors | Electricity | 1 | Active |
| US7671676B2 | Continuous time common-mode feedback module and method with wide swing and good linearity | Electricity | 1 | Active |
| US9300317B2 | Adaptive delay based asynchronous successive approximation analog-to-digital converter | Electricity | 0 | Active |
| US8421519B2 | Switched charge storage element network | Physics | 0 | Active |
| US10171100B2 | Circuit and method for generating reference signals for hybrid analog-to-digital convertors | Electricity | 0 | Active |
| US9851731B2 | Ultra low temperature drift bandgap reference with single point calibration technique | Physics | 0 | Active |
| US10505562B2 | Circuit and method for generating reference signals for hybrid analog-to-digital convertors | Electricity | 0 | Active |
| US10615815B2 | High-linearity flash analog to digital converter | Electricity | 0 | Active |
| US9000826B2 | Level shifting circuit with adaptive feedback | Electricity | 0 | Active |
| US9722623B1 | Analog-to-digital converter with dynamic element matching | Electricity | 0 | Active |
| US9866233B1 | Circuit and method for generating reference signals for hybrid analog-to-digital convertors | Electricity | 0 | Active |
| US10727861B2 | Excess loop delay estimation and correction | Electricity | 0 | Active |
| US8766697B2 | Level shifting circuit with adaptive feedback | Electricity | 0 | Active |
| US7737780B2 | Scheme for improving settling behavior of gain boosted fully differential operational amplifier | Electricity | 0 | Active |
| US7852159B2 | Method for adaptive biasing of fully differential gain boosted operational amplifiers | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.