Coordinates-based variational autoencoder for generating synthetic via layout patterns
US10621301B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2018 |
| Grant date | Apr 14, 2020 |
| Priority date | — |
| Expiry date | Oct 10, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is presented for generating a plurality of physical design layout patterns. The method includes selecting one or more physical design layouts for neural network training, converting the plurality of physical design layout patterns into coordinate arrays, a coordinate array of the coordinate arrays including via center coordinates of vias in a physical design layout pattern of the plurality of physical design layout patterns, training, by employing the coordinate arrays, a variational autoencoder (VAE), and generating one or more new synthetic coordinate arrays by employing the trained VAE, a synthetic coordinate array of the one or more new synthetic coordinate arrays including via center coordinates of vias for a new physical design layout pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.