Patent · US Active

Method of bias temperature instability calculation and prediction for MOSFET and FinFET

US10621386B1 · kind B1 · utility

1Cited by
1References
19Claims
0Family size

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Key dates

Filing dateMar 20, 2017
Grant dateApr 14, 2020
Priority date
Expiry dateApr 11, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/367
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method, a system and a non-transitory machine-readable storage medium are provided. In one or more aspects, a computer-implemented method for bias temperature instability (BTI) calculation of a device includes simulating the device, using an electronic design automation tool. The simulation includes determining a first degradation value after applying a first sequence of stress values to the device for a first plurality of time steps. The simulation further includes determining a first degradation recovery value after the first plurality of time steps. The simulation further includes determining a first recovered degradation value after the first plurality of time steps by combining the first degradation value and the first degradation recovery value. The first degradation value, the first degradation recovery value, and the first recovered degradation value are associated with one or more model parameters of the device. The simulation is a transient analysis simulation, and the device is a FINFET or MOSFET device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.