Voltage correction computations for memory decision feedback equalizers
US10623211B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2019 |
| Grant date | Apr 14, 2020 |
| Priority date | — |
| Expiry date | Apr 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/107
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A device includes a first terminal configured to receive a reference voltage, a second terminal configured to receive a weighted tap value, a local generator circuit configured to create a group of unsigned voltage correction values based on the reference voltage and the weighted tap value, and a sign configuring circuit configured to receive the group of unsigned voltage correction values from the local generator circuit and assign a polarity to each respective unsigned voltage correction value of the group of unsigned voltage correction values, creating correction signals from the group of unsigned voltage correction values. The device also includes an output configured to transmit the correction signals to a first input of a processing circuit, wherein the processing circuit is configured to use the correction signals to offset inter-symbol interference from a data stream on a distorted bit based at least on a control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.