Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cache
US10628314B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2017 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | Nov 1, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention are directed to managing a shared high-level cache for dual clusters of fully connected integrated circuit multiprocessors. An example of a computer-implemented method includes: providing a drawer comprising a plurality of clusters, each of the plurality of clusters comprising a plurality of processors; providing a shared cache integrated circuit to manage a shared cache memory among the plurality of clusters; receiving, by the shared cache integrated circuit, an operation of one of a plurality of operation types from one of the plurality of processors; and processing, by the shared cache integrated circuit, the operation based at least in part on the operation type of the operation according to a set of rules for processing the operation type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.