Electrostatic discharge protection semiconductor device
US10629585B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2018 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | May 18, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/813
Abstract
An electrostatic discharge (ESD) protection device includes a substrate, a first gate group and a second gate group on the substrate, a drain region and a fourth doped region respectively at two sides of the first gate group, a source region and the fourth doped region respectively at two sides of the second gate group, a first doped region in the substrate and surrounded by the drain region, and a second doped region in the substrate and surrounded by the fourth doped region. The drain region and the source region have a first conductivity type. The first doped region and the second doped region have a second conductivity type complementary to the first conductivity type. The drain region is electrically connected to an input/output pad. The source region is electrically connected to a ground pad. The first doped region and the second doped region are electrically connected to each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.