Method for manufacturing semiconductor and structure thereof
US10629673B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2019 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | Jan 18, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor structure is provided. The method includes: providing a conductive terminal exposed from a passivation; forming a capacitor structure under the passivation proximal to a heterogeneous interface; electrically connecting the capacitor structure to the conductive terminal and isolating the capacitor structure from other electrical components in the semiconductor structure; and probing the conductive terminal to measure an electrical parameter of the capacitor structure covered by the passivation, wherein the electrical parameter corresponds to a humidity permeability at the heterogeneous interface. A semiconductor structure thereof is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.