Patent · US Active

Memory system

US10635333B2 · kind B2 · utility

2Cited by
0References
16Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 13, 2017
Grant dateApr 28, 2020
Priority date
Expiry dateApr 14, 2038

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory system includes: a non-volatile memory device for including a first storage region and a second storage region; and a controller for including first and second interfaces for inputting/outputting a data to/from a host, inputting/outputting a first data of the first storage region through the first interface, and inputting/outputting a second data of the second storage region through the second interface, wherein when the first data is programmed in the first storage region, the controller detects a value of the first data, selectively inverts the value of the first data based on the detection result, and program a resultant value, and when the second data is programmed in the second storage region, the controller detects a state of the second storage region where the second data is programmed, selectively inverts a value of the second data based on the state detection result, and program a resultant value.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.