Enhancing stability of half perimeter wire length (HPWL)-driven analytical placement
US10635773B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2018 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Oct 18, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The performance of a computer performing electronic design analysis is improved by representing a putative circuit design as a set of movable blocks of predetermined size which must fit into a bounding box (said blocks include a plurality of subsets to be interconnected by wires) and initially placing the set of blocks by quadratic initialization. Each of the blocks has first and second coordinates and weights are assigned to nets connecting those of the blocks within the subsets, the quadratic initialization in turn includes determining a cost of each of the nets connecting any two of the blocks within the subsets as one-half of a sum of squares of distances between the any two of the blocks; and minimizing a total cost over all of the nets to determine an initial placement of the set of blocks. Analytical placement is then carried out based on the initial quadratic placement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.