Semiconductor memory device, manufacturing method thereof and output method of data strobe signal
US10636497B2 · kind B2 · utility
1Cited by
7References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 24, 2018 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Aug 24, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/108
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device suppressing a shift between data output from a plurality of memory chips and a DQS signal. A flash memory device of the disclosure includes memory chips, a plurality of IO terminals capable of inputting and outputting data, and a DQS terminal. Each of the memory chips includes an output circuit used to output data and a DQS output circuit. The DQS output circuit is used to output the DQS signal for defining a timing of the data output from the output circuit. The DQS signal output from each of the DQS output circuits of the memory chips is supplied to the DQS terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.