Method of fabricating a semiconductor package
US10636761B2 · kind B2 · utility
5Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2018 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Aug 30, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a method of fabricating a semiconductor package. The method includes preparing a package substrate having a substrate pad, and mounting a semiconductor chip on the substrate pad. Mounting the semiconductor chip includes forming a resin layer containing a solder and reducing agent granules having a first capsule layer, between a chip pad of the semiconductor chip and the substrate pad, and bonding the chip pad to the substrate pad using laser irradiated to the semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.