Semiconductor device
US10636785B2 · kind B2 · utility
0Cited by
13References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 26, 2019 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Apr 26, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53295
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate including a first region and a second region, a cell gate pattern on the first region of the substrate, a dummy gate pattern on the second region of the substrate, a resistor pattern on the second region of the substrate and over the dummy gate pattern, and a connection structure coupled to each of the connection regions. The resistor pattern includes a body region and connection regions at both sides of the body region. The dummy gate pattern overlaps the body region and does not be overlap the connection regions, when viewed in a plan view.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.