Dedicated termination dies for memory systems
US10637533B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2018 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Oct 13, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06562
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a controller die and a group of dies that communicate with each other via a transmission line. Less than all of the dies of the group includes a respective on-die termination resistance circuit coupled to the transmission line. In some embodiments, one of the dies that includes an on-die termination resistance circuit is an end die of the group. In particular embodiments, the end die is the only die of the group that includes an on-die termination resistance circuit coupled to the transmission line. Transmission frequencies or data rates may be increased without degrading signal quality by removing capacitance associated with on-die termination resistance circuits from at least one of the dies of the group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.