Memory device and fabrication method thereof
US10644231B2 · kind B2 · utility
11Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2017 |
| Grant date | May 5, 2020 |
| Priority date | — |
| Expiry date | Nov 30, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a memory device includes forming a resistance switching element over a bottom electrode; forming a top electrode over the resistance switching element; forming a first spacer covering a sidewall of the resistance switching element; forming a second spacer surrounding the first spacer and exposing the top electrode; and forming a metallization pattern connected with the top electrode and the second spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.