Patent · US Active

Ternary memory cell and ternary memory cell arrangement

US10650892B2 · kind B2 · utility

11Cited by
3References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateApr 23, 2018
Grant dateMay 12, 2020
Priority date
Expiry dateMay 15, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C11/223
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In various embodiments, a ternary memory cell is provided, the ternary memory cell including: a first ferroelectric memory cell and a second ferroelectric memory cell in a parallel or serial arrangement, wherein each of the first ferroelectric memory cell and the second ferroelectric memory cell is switchable into a first ferroelectric memory cell state and a second ferroelectric memory cell state; and wherein a first matching state is defined by the first ferroelectric memory cell in the first ferroelectric memory cell state and the second ferroelectric memory cell in the second ferroelectric memory cell state, wherein a second matching state is defined by the first ferroelectric memory cell in the second ferroelectric memory cell state and the second ferroelectric memory cell in the first ferroelectric memory cell state, and wherein a third matching state is defined by the first ferroelectric memory cell and the second ferroelectric memory cell being in the same ferroelectric memory cell state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.