Cascode semiconductor package and related methods
US10651115B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2019 |
| Grant date | May 12, 2020 |
| Priority date | — |
| Expiry date | Apr 19, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13064
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes an electrically conductive base (base) having a source connector. A drain connector and a gate connector are electrically coupled with the base. A depletion mode gallium nitride field-effect transistor (GaN FET) and an enhancement mode laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOS FET) are also coupled with the base. The gate connector and a gate contact of the LDMOS FET are both included in a first electrical node, the source connector and a source contact of the LDMOS FET are both included in a second electrical node, and the drain connector and a drain contact of the GaN FET are both included in a third electrical node. The GaN FET and LDMOS FET together form a cascode that operates as an enhancement mode amplifier. The semiconductor package does not include an interposer between the GaN FET and the base or between the LDMOS FET and the base.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.