Technique for decoupling plasma antennae from actual circuitry
US10651136B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2017 |
| Grant date | May 12, 2020 |
| Priority date | — |
| Expiry date | Sep 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
When forming semiconductor devices, plasma-induced damage may be prevented or restricted by providing a conductive path between critical areas and the substrate of the semiconductor device. According to the present disclosure, a negative effect of any such protective structures on the performance of the semiconductor device may be significantly reduced by permanently interrupting the corresponding electrical connection at any appropriate point in time of the manufacturing sequence. Furthermore, respective fuse structures acting as current-sensitive areas may also be implemented in test structures in order to evaluate plasma-induced currents, thereby providing a possibility for a more efficient design of respective protective structures and/or for contributing to superior process control of critical plasma treatments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.