Three-dimensional memory devices and methods for forming the same
US10651187B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 1, 2018 |
| Grant date | May 12, 2020 |
| Priority date | — |
| Expiry date | Oct 1, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
Embodiments of three-dimensional (3D) memory devices and methods for forming the 3D memory devices are disclosed. In an example, a 3D memory device includes a substrate, a peripheral device disposed on the substrate, a peripheral interconnect layer disposed above the peripheral device, a first source plate disposed above and electrically connected to the peripheral interconnect layer, a first memory stack disposed on the first source plate, a first memory string extending vertically through the first memory stack and in contact with the first source plate, and a first bit line disposed above and electrically connected to the first memory string and the peripheral device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.