CMOS image sensor with improved column data shift readout
US10652492B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2019 |
| Grant date | May 12, 2020 |
| Priority date | — |
| Expiry date | Feb 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An imaging sensor having a pixel array with a separate analog-to-digital conversion (ADC) circuit coupled on an input side to each column line and on an output side to a separate M-bit wide digital memory circuit and a column data readout circuit comprising N M-bit data shifters. Each M-bit data shifter has an M-bit wide output, and single pole double throw (SPDT) switches whose common terminals provide inputs to the M-bit data shifters, wherein a first switch state of the SPDT switches connects the input of their associated M-bit data shifters to their associated M-bit wide digital memory circuits and wherein a second switch state of the SPDT switches connects the input of their associated M-bit data shifters to an M-bit wide output bus from an adjacent M-bit data shifter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.