Narrow-parallel scan-based device testing

US10656205B2 · kind B2 · utility

Assignee

• Oracle International Corporation · US

Inventors

• Mark Semmelmeyer · Sunnyvale, US
• Ali Vahidsafa · Palo Alto, US
• Sebastian Turullols · Los Altos, US
• Scott Cooke · Townsend, US
• Senthilkumar Diraviam · San Jose, US
• Preethi Sama · Santa Clara, US

Key dates

• Filing date: Feb 1, 2018
• Grant date: May 19, 2020
• Expiry date: Dec 29, 2038

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/31919
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Embodiments include systems and methods for in-system, scan-based device testing using novel narrow-parallel (NarPar) implementations. Embodiments include a virtual automated test environment (VATE) system that can be disposed within the operating environment of an integrated circuit for which scan-based testing is desired (e.g., a chip under test, or CuT). For example, the VATE system is coupled with a service processor and with the CuT via a novel NarPar interface. A sequence controller can drive a narrow set of parallel scan pins on the CuT via the NarPar interface of the VATE system in accordance with an adapted test sequence having bit vector stimulants and expected responses. Responses of the CuT to the bit vector stimulants can be read out and compared to the expected results for scan-based testing of the chip.