Formation method of interconnection structure of semiconductor device
US10658234B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jul 29, 2016 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | Jul 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53266
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structures and formation methods of a semiconductor device structure are provided. The method includes forming a dielectric layer over a semiconductor substrate and forming an opening in the dielectric layer to expose a conductive element. The method also includes forming a conductive layer over the conductive element and modifying an upper portion of the conductive layer using a plasma operation to form a modified region. The method further includes forming a conductive plug over the modified region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.