Chi On Chui
397Patents
7h-index
203Co-inventors
77Inventor score
Filing activity: Mar 31, 2003 → Jun 10, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7435987B1 | Forming a type I heterostructure in a group IV semiconductor | Electricity | 24 | Active |
| US10062784B1 | Self-aligned gate hard mask and method forming same | Electricity | 24 | Active |
| US7928426B2 | Forming a non-planar transistor having a quantum well channel | Electricity | 16 | Active |
| US7629603B2 | Strain-inducing semiconductor regions | Electricity | 16 | Active |
| US9768278B1 | Reduction of Fin loss in the formation of FinFETS | Electricity | 11 | Active |
| US8237153B2 | Forming a non-planar transistor having a quantum well channel | Electricity | 9 | Active |
| US9899258B1 | Metal liner overhang reduction and manufacturing method thereof | Electricity | 8 | Active |
| US10134604B1 | Semiconductor device and method | Electricity | 7 | Active |
| US11227956B2 | Nanosheet field-effect transistor device and method of forming | Electricity | 7 | Active |
| US9645135B2 | Nanowire field-effect transistor biosensor with improved sensitivity | Emerging Cross-Sectional Technologies | 7 | Active |
| US7495313B2 | Germanium substrate-type materials and approach therefor | Electricity | 7 | Expired |
| US7919381B2 | Germanium substrate-type materials and approach therefor | Electricity | 6 | Active |
| US10037923B1 | Forming transistor by selectively growing gate spacer | Electricity | 5 | Active |
| US7271458B2 | High-k dielectric for thermodynamically-stable substrate-type materials | Electricity | 5 | Expired |
| US10283624B1 | Semiconductor structure and method for forming the same | Electricity | 4 | Active |
| US10164042B2 | Semiconductor device and manufacturing method thereof | Electricity | 4 | Active |
| US11417739B2 | Contacts for semiconductor devices and methods of forming the same | Electricity | 4 | Active |
| US11043570B2 | Semiconductor device and manufacturing method thereof | Electricity | 4 | Active |
| US11018256B2 | Selective internal gate structure for ferroelectric semiconductor devices | Electricity | 3 | Active |
| US10515896B2 | Interconnect structure for semiconductor device and methods of fabrication thereof | Electricity | 3 | Active |
| US11532479B2 | Cut metal gate refill with void | Electricity | 3 | Active |
| US10593775B2 | Semiconductor device and manufacturing method thereof | Electricity | 3 | Active |
| US11289603B2 | Semiconductor device and method | Electricity | 3 | Active |
| US11302793B2 | Transistor gates and method of forming | Electricity | 3 | Active |
| US11437474B2 | Gate structures in transistors and method of forming same | Electricity | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.