Wafer-level packaging for enhanced performance

US10658259B2 · kind B2 · utility

Assignee

• Qorvo US, Inc. · US

Inventors

• Julio C. Costa · Oak Ridge, US
• Merrill Albert Hatcher, Jr. · Greensboro, US
• Peter V. Wright · Portland, US
• Jon Chadwick · Greensboro, US

Key dates

• Filing date: May 30, 2018
• Grant date: May 19, 2020
• Expiry date: May 30, 2038

Classification

• Technology area (CPC —): General

Abstract

The present disclosure relates to a mold module that includes a device layer, a number of first bump structures, a first mold compound, a stop layer, and a second mold compound. The device layer includes a number of input/output (I/O) contacts at a top surface of the device layer. Each first bump structure is formed over the device layer and electronically coupled to a corresponding I/O contact. The first mold compound resides over the device layer, and a portion of each first bump structure is exposed through the first mold compound. The stop layer is formed underneath the device layer. The second mold compound resides underneath the stop layer, such that the stop layer separates the device layer from the second mold compound.