Time-interleaved analog-to-digital converter with calibration
US10659072B1 · kind B1 · utility
4Cited by
3References
20Claims
0Family size
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Key dates
| Filing date | Dec 14, 2018 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | Dec 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/168
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus is provided to calibrate an analog-to-digital converter (ADC). The apparatus includes a calibration circuitry coupled to an output of the ADC, wherein the calibration circuitry is to identify a maximum value and minimum value of the output of the ADC, and is to calibrate one or more performance parameters of the ADC according to the maximum and minimum values. The performance parameters include: gain of the ADC, offset of the ADC, and timing skew between the ADC and a neighboring ADC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.