Bandwidth saving architecture for scalable video coding spatial mode
US10659796B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 10, 2018 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | Oct 27, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/80
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system and method for scalable video coding that includes base layer having lower resolution encoding, enhanced layer having higher resolution encoding and the data transferring between two layers. The system and method provides several methods to reduce bandwidth of inter-layer transfers while at the same time reducing memory requirements. Due to less memory access, the system clock frequency can be lowered so that system power consumption is lowered as well. The system avoids having prediction data from base layer to enhanced layer to be up-sampled for matching resolution in the enhanced layer as transferring up-sampled data can impose a big burden on memory bandwidth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.