Integrated circuit with airgaps to control capacitance
US10665499B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2018 |
| Grant date | May 26, 2020 |
| Priority date | — |
| Expiry date | Jun 28, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment includes first, second, and third metal layers; first, second, and third metal lines included in the second metal layer; a layer including airgaps, the first metal layer being between the layer including airgaps and the second metal layer; a first void between the first and second metal lines and a second void between the second and third metal lines; a conformal layer between the first and second metal lines; an additional layer between the first and second metal layers; wherein the first void includes air and the second void includes air; wherein a first axis intersects the first, second, and third metal lines and the first and second voids; wherein a second axis, orthogonal to the first axis, intersects the conformal layer and the additional layer; wherein a third axis, orthogonal to the first axis, intersects the second metal line and the additional layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.