Wafer level package structure with internal conductive layer

US10672731B2 · kind B2 · utility

Assignee

• Intel IP Corporation · US

Inventors

• Sven Albers · Regensburg, DE
• Klaus Reingruber · Langquaid, DE
• Georg Seidemann · Landshut, DE
• Christian Geissler · Teugn, DE
• Richard Patten · Minneapolis, US

Key dates

• Filing date: Dec 23, 2015
• Grant date: Jun 2, 2020
• Expiry date: Dec 23, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3025
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An apparatus is described that includes a redistribution layer and a semiconductor die on the redistribution layer. An electrically conductive layer resides over the semiconductor die. A compound mold resides over the electrically conductive layer.