Digital signal processing block

US10673438B1 · kind B1 · utility

Assignee

• XILINX, INC. · US

Inventors

• Adam Elkins · San Jose, US
• Ephrem C. Wu · San Mateo, US
• John M. Thendean · Berkeley, US
• Adnan Pratama · San Jose, US
• Yashodhara Parulkar · Santa Clara, US
• Xiaoqian Zhang · Shanghai, CN

Key dates

• Filing date: Apr 2, 2019
• Grant date: Jun 2, 2020
• Expiry date: Apr 2, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K19/1776
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A digital signal processor (DSP) slice is disclosed. The DSP slice includes an input stage to receive a plurality of input signals, a pre-adder coupled to the input stage and configured to perform one or more operations on one or more of the plurality of input signals, and a multiplier coupled to the input stage and the pre-adder and configured to perform one or more multiplication operations on one or more of the plurality of input signals or the output of the pre-adder. The DSP slice further includes an arithmetic logic unit (ALU) coupled to the input stage, the pre-adder, and the multiplier. The ALU is configured to perform one or more mathematical or logical operations on one or more of the plurality of input signals, the output of the pre-adder, or the output of the multiplier. The DSP slice also includes an output stage coupled to the ALU, the output stage configured to generate one or more output signals based at least in part on one or more of the outputs of the ALU, or at least one of the plurality of input signals.