Priority based circuit synthesis
US10678981B2 · kind B2 · utility
0Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2018 |
| Grant date | Jun 9, 2020 |
| Priority date | — |
| Expiry date | Oct 3, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method includes receiving a text description of a logic circuit design, reading a plurality of circuit priority indicator values, synthesizing a logic circuit design based, at least in part, on those circuit priority indicator values, and fabricating logic circuits using the synthesized logic circuit design. A corresponding computer program product and computer system are also disclosed herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.