Packaged wafer processing method
US10679910B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2017 |
| Grant date | Jun 9, 2020 |
| Priority date | — |
| Expiry date | May 15, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/5446
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A packaged wafer processing method includes a processing step of processing each division line formed on a packaged wafer by using a laser beam applying unit and a feeding mechanism, and indexing the wafer by a preset index amount “a” corresponding to the pitch of the division lines by using an indexing mechanism, thereby forming a laser processed groove along each division line. A correcting step images the next division line to be processed in an exposed peripheral portion of the wafer and the laser processed groove just formed along the present division line, at any arbitrary time during the processing step. The distance “b” between the next division line and the laser processed groove just formed is determined, and then a correction index amount “c” is calculated by using the deviation corresponding to the difference (a−b) between the preset index amount “a” and the distance “b”.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.