IC with ion milled thin-film resistors
US10680056B1 · kind B1 · utility
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Key dates
| Filing date | Dec 26, 2018 |
| Grant date | Jun 9, 2020 |
| Priority date | — |
| Expiry date | Dec 26, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method of fabricating an integrated circuit (IC) includes providing a substrate having a semiconductor surface layer comprising an unpatterned resistive layer. Measurements are obtained of a characteristic of the unpatterned resistive layer at each of a plurality of locations over the substrate. The unpatterned resistive layer is modified, such as by targeted removal of layer material, in response to the measurements such that the measured characteristic is more uniform across the substrate. A resistor on the IC is defined from the unpatterned resistive layer after the modifying.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.