High voltage tolerant LDMOS

US10680098B2 · kind B2 · utility

Assignee

• IMEC VZW · BE

Inventors

• Shih-Hung Chen · Hengshan, TW
• Dimitri Linten · Boortmeerbeek, BE
• Geert Hellings · Halle, BE

Key dates

• Filing date: Dec 22, 2016
• Grant date: Jun 9, 2020
• Expiry date: Oct 9, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/393

Abstract

An LDMOS device in FinFET technology is disclosed. In one aspect, the device includes a first region substantially surrounded by a second region of different polarity. The device further includes a first fin in the first region, extending into the second region, the first fin including a doped source region connected with a first local interconnect. The device further includes a second fin in the second region, including a doped drain region connected with a second local interconnect. The device further includes a third fin parallel with the first and second fins including a doped drain region connected with the second local interconnect. The device further includes a gate over the first fin at the border between the first and second regions. A first current path runs over the first and second fins. A second current path runs over and perpendicular to the first fin towards the third fin.