Patent · US Active

Semiconductor device including volatile and non-volatile memory cells

US10685708B2 · kind B2 · utility

3Cited by
5References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 9, 2018
Grant dateJun 16, 2020
Priority date
Expiry dateAug 9, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B43/40
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a substrate having a volatile memory region and a non-volatile memory region. The volatile memory region includes a cell capacitor disposed in the substrate and a cell transistor connected to the cell capacitor. The non-volatile memory region includes a plurality of non-volatile memory cells disposed on the substrate. The volatile memory region and the non-volatile memory region are disposed side by side.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.