Solid phase epitaxy of 3C-SiC on Si(001)
US10686041B2 · kind B2 · utility
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Key dates
| Filing date | Apr 6, 2017 |
| Grant date | Jun 16, 2020 |
| Priority date | — |
| Expiry date | Oct 6, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/405
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A 3C—SiC buffer layer on Si(001) comprising a porous buffer layer of 3C—SiC on a Si(001) substrate, wherein the porous buffer layer is produced through a solid state reaction, and wherein an amorphous carbon layer on the Si(001) substrate is deposited by magnetron sputtering of a C target at room temperature at a rate of 0.8 nm/min.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.