Circuit operating speed detecting circuit
US10686433B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2019 |
| Grant date | Jun 16, 2020 |
| Priority date | — |
| Expiry date | Sep 17, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00019
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed is a circuit operating speed detecting circuit configured to detect an operating speed of a target circuit during a monitor mode. The circuit operating speed detecting circuit includes a signal generator, an adjustable delay circuit, and a signal detector. During the monitor mode, the signal generator generates a predetermined signal in a current operating condition, the adjustable delay circuit generates a delay signal according to the predetermined signal in the current operating condition, and the signal detector detects the degree of delay of the delay signal in the current operating condition so as to generate a first result if the degree of delay is not greater than a predetermined threshold and generate a second result if the degree of delay is greater than the predetermined threshold, in which the first and the second results are related to the operating speed of the target circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.