Method for fabricating a semiconductor device
US10692750B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2018 |
| Grant date | Jun 23, 2020 |
| Priority date | — |
| Expiry date | May 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/113
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device includes receiving a silicon substrate having an isolation feature disposed on the substrate and a well adjacent the isolation feature, wherein the well includes a first dopant. The method also includes etching a recess to remove a portion of the well and epitaxially growing a silicon layer (EPI layer) in the recess to form a channel, wherein the channel includes a second dopant. The method also includes forming a barrier layer between the well and the EPI layer, the barrier layer including at least one of either silicon carbon or silicon oxide. The barrier layer can be formed either before or after the channel. The method further includes forming a gate electrode disposed over the channel and forming a source and drain in the well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.