Method for manufacturing silicon carbide epitaxial substrate, method for manufacturing silicon carbide semiconductor device, and apparatus for manufacturing silicon carbide epitaxial substrate
US10697086B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2016 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Nov 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In forming of a silicon carbide layer, when an X axis indicates a first value representing, in percentage, a value obtained by dividing a flow rate of silane by a flow rate of hydrogen and a Y axis indicates a second value representing a flow rate of ammonia in sccm, the first value and the second value fall within a quadrangular region surrounded by first coordinates, second coordinates, third coordinates, and fourth coordinates in XY plane coordinates. The first coordinates are (0.05, 6.5×10−4). The second coordinates are (0.05, 4.5×10−3). The third coordinates are (0.22, 1.2×10−2). The fourth coordinates are (0.22, 1.3×10−1). After the forming of the silicon carbide layer, an average value of carrier concentration of the silicon carbide layer is more than or equal to 1×1015 cm−3 and less than or equal to 2×1016 cm−3.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.