Patent · US Active

Memory system

US10698617B2 · kind B2 · utility

0Cited by
4References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 6, 2019
Grant dateJun 30, 2020
Priority date
Expiry dateMar 6, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7206
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

According to one embodiment, a memory system includes: a non-volatile memory including a first area configured to hold first data received from an outside and a second area configured to hold second data; a volatile memory; and a controller. The non-volatile memory holds third data that associates a first address of the first data assigned to an instruction received from an outside with a second address of the first data that specifies a part of the first area. As a startup operation, the controller reads the third data from the non-volatile memory and holds the third data as fourth data in the volatile memory. The controller erases the fourth data from the volatile memory when the second data is held in the second area.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.