Patent · US Active

Semiconductor device integrating backside power grid and related integrated circuit and fabrication method

US10700207B2 · kind B2 · utility

21Cited by
0References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 30, 2018
Grant dateJun 30, 2020
Priority date
Expiry dateMay 30, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/6219
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a substrate, a dielectric region, a plurality of conductive regions, a first conductive rail and a conductive structure. The dielectric region is situated on the substrate. The plurality of conductive regions are situated on the dielectric region. The first conductive rail is situated within the dielectric region, and is electrically connected to a first conductive region of the plurality of conductive regions. The conductive structure is arranged to penetrate through the substrate and formed under the first conductive rail. The conductive structure is electrically connected to the first conductive rail.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.