Method and device for estimating level of damage or lifetime expectation of power semiconductor module
US10705133B2 · kind B2 · utility
2Cited by
1References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 26, 2017 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Apr 3, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2849
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention concerns a method and a device for estimating a level of damage or a lifetime expectation of a power semiconductor module comprising at least one die that is mechanically, thermally, and electrically attached to a substrate, composed of plural layers of different materials. The invention:
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.