Patent · US Active

Method and system for detection of thread stall

US10705843B2 · kind B2 · utility

0Cited by

5References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Omesh Bajaj · Austin, US
Kevin Barnett · Austin, US
Debapriya Chatterjee · Austin, US
Bryant Cockcroft · Austin, US
Jamory Hawkins · Austin, US
Lance G. Hehenberger · Leander, US
Jeffrey William Kellington · Pflugerville, US
Paul Frank Lecocq · Cedar Park, US
Lawrence Leitner · Austin, US
Tharunachalam Pindicura · Austin, US
John A. Schumann · Austin, US
Paul Umbarger · Austin, US
Karen Yokum · Austin, US

Key dates

Filing date	Dec 21, 2017
Grant date	Jul 7, 2020
Priority date	—
Expiry date	Apr 5, 2038

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/30105
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method of checking for a stall condition in a processor is disclosed, the method including inserting an inline instruction sequence into a thread, the inline instruction sequence configured to read the result from a timing register during processing of a first instruction and store the result in a first general purpose register, wherein the timing register functions as a timer for the processor; and read the results from the timing register during processing of a second instruction and store the results in a second general purpose register, wherein the second instruction is the next consecutive instruction after the first instruction. The inline thread sequence may be inserted in sequence with the thread and further configured to compare the difference between the result in the first and second general purpose register to a programmable threshold.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.