John A. Schumann
24Patents
2h-index
35Co-inventors
53Inventor score
Filing activity: Jan 30, 2008 → Oct 6, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8073668B2 | Method and apparatus for testing a full system integrated circuit design by statistical fault injection using hardware-based simulation | Physics | 9 | Active |
| US8832502B2 | Hardware verification using acceleration platform | Physics | 8 | Active |
| US9747396B1 | Driving pervasive commands using breakpoints in a hardware-accelerated simulation environment | Physics | 2 | Active |
| US10754791B2 | Software translation prefetch instructions | Physics | 1 | Active |
| US9921897B2 | Testing a non-core MMU | Physics | 1 | Active |
| US10942853B2 | System and method including broadcasting an address translation invalidation instruction with a return marker to indentify the location of data in a computing system having mutiple processors | Physics | 1 | Active |
| US9939487B2 | Circuit design verification in a hardware accelerated simulation environment using breakpoints | Physics | 0 | Active |
| US11347505B2 | Processor performance monitor that logs reasons for reservation loss | Physics | 0 | Active |
| US10007568B2 | Testing a non-core MMU | Physics | 0 | Active |
| US10915456B2 | Address translation cache invalidation in a microprocessor | Physics | 0 | Active |
| US11301392B2 | Address translation cache invalidation in a microprocessor | Physics | 0 | Active |
| US11475191B2 | Generating and adding additional control information to logic under test to facilitate debugging and comprehension of a simulation | Physics | 0 | Active |
| US11875095B2 | Method for latency detection on a hardware simulation accelerator | Physics | 0 | Active |
| US11080122B2 | Software-invisible interrupt for a microprocessor | Physics | 0 | Active |
| US11436013B2 | Method and system for detection of thread stall | Physics | 0 | Active |
| US11556365B2 | Obscuring information in virtualization environment | Electricity | 0 | Active |
| US11243864B2 | Identifying translation errors | Physics | 0 | Active |
| US10705843B2 | Method and system for detection of thread stall | Physics | 0 | Active |
| US10228422B2 | Driving pervasive commands using breakpoints in a hardware-accelerated simulation environment | Physics | 0 | Active |
| US10539614B2 | Circuit design verification in a hardware accelerated simulation environment using breakpoints | Physics | 0 | Active |
| US11138089B2 | Performance benchmark generation | Physics | 0 | Active |
| US10579376B2 | Processor performance monitor that logs reasons for reservation loss | Physics | 0 | Active |
| US11157285B2 | Dynamic modification of instructions that do not modify the architectural state of a processor | Physics | 0 | Active |
| US10896273B2 | Precise verification of a logic problem on a simulation accelerator | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.