Trench plug hardmask for advanced integrated circuit structure fabrication
US10707133B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2017 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Feb 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a fin comprising silicon. A plurality of gate structures is over the fin, individual ones of the plurality of gate structures along a direction orthogonal to the fin and having a pair of dielectric sidewall spacers. A trench contact structure is over the fin and directly between the dielectric sidewalls spacers of a first pair of the plurality of gate structures. A contact plug is over the fin and directly between the dielectric sidewalls spacers of a second pair of the plurality of gate structures, the contact plug comprising a lower dielectric material and an upper hardmask material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.