Method and apparatus for analog/digital conversion
US10707888B2 · kind B2 · utility
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5References
20Claims
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Key dates
| Filing date | Apr 17, 2019 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Apr 17, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/468
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus for determining the suitability of a test delay value between comparator decisions of a comparator circuit of an asynchronous successive approximation analog/digital converter and a method for determining an optimized delay value of a comparator of an asynchronous successive approximation analog/digital converter are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.