Semiconductor device for managing wear leveling operation of a nonvolatile memory device
US10713159B2 · kind B2 · utility
1Cited by
8References
16Claims
0Family size
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Key dates
| Filing date | Jul 13, 2018 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Aug 8, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7211
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device may include a media controller configured to output an address in response to receiving a write request for writing to a nonvolatile memory. The semiconductor device may also include a hot address detector. The hot address detector is configured to store a list including the address output from the media controller and including meta data related to the address, to update the meta data according to the address output from the media controller, to determine whether the address output from the media controller is a hot address, and to adjust a length of the list.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.