Data processing system with a scalable architecture over ethernet
US10713334B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2017 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Jun 21, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B2219/2214
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
According to one embodiment, a data processing system includes a plurality of processing units, each processing unit having one or more processor cores. The system further includes a plurality of memory roots, each memory root being associated with one of the processing units. Each memory root includes one or more branches and a plurality of memory leaves to store data. Each of the branches is associated with one or more of the memory leaves and to provide access to the data stored therein. The system further includes a memory fabric coupled to each of the branches of each memory root to allow each branch to access data stored in any of the memory leaves associated with any one of remaining branches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.