Storage device and storage method
US10714124B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 28, 2019 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Aug 28, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2020/1292
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, in a storage device, a selection circuit selects one mapping rule from a plurality of mapping rules in which each of bit labels having a bit length of (n+1) or more is mapped to n M-ary symbols, when M is defined as an integer of 3 or more and n is defined as an integer of or more. A first conversion circuit converts a data block in data into an M-ary symbol sequence using the selected one mapping rule. A second conversion circuit converts the converted M-ary symbol sequence into an M-step pulse width signal. The recording medium records the converted M-step pulse width signal. A readback circuit equalizes the signal read from the recording medium to the M-ary symbol sequence and restores the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.