Non-volatile memory and reset method thereof
US10714157B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2019 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Aug 27, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0064
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory and a reset method thereof are provided. The reset method includes: performing a first reset operation on a plurality of memory cells; recording a plurality of first verifying currents respectively corresponding to a plurality of first failure memory cells; performing a second reset operation on the first failure memory cells, and verifying second failure memory cells to obtain a plurality of second verifying currents; setting a first voltage modify flag according to a plurality of first ratios between the first verifying currents and the respectively corresponding second verifying currents; and adjusting a reset voltage for performing the first reset operation and the second reset operation according to the first voltage modify flag.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.